JISE


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Journal of Information Science and Engineering, Vol. 32 No. 6, pp. 1487-1502


Improving Resource Utilization by Curbing Speculative Trace Progression in Simultaneous Multi-Threading CPUs


YILIN ZHANG1 AND WEI-MING LIN2
1Advanced Micro Devices, Inc.
Austin, TX 78735, USA

2Department of Electrical and Computer Engineering
The University of Texas at San Antonio
San Antonio, TX 78249-0669, USA
E-mail: zhangyilin.bupt@gmail.com; weiming.lin@utsa.edu


    Simultaneous Multi-Threading (SMT) improves the overall performance of superscalar CPUs by allowing concurrent execution of multiple independent threads with sharing of key datapath components in order to better utilize the resources. Speculative executions help modern processors to exploit more Instruction-Level Parallelism. However, the performance penalty from a miss speculation is much more prominent in an SMT environment than a traditional multi-threading system due to the resulted waste of shared resources at clock-cycle level, versus thread level. In this paper, we show that instructions fetched due to incorrect prediction can be more than 30% of all instructions, which results in a huge waste of resources that could have been better used by other non-speculative threads. To minimize this waste of resources, a technique is proposed in this paper to control the amount of speculative instructions dispatched into Issue Queue (IQ), the most critically shared resource in the SMT pipeline. Simulation result shows the proposed technique can reduce the waste of resource due to miss-speculated traces by 38% and improve overall throughput by up to 17% in IPC.


Keywords: computer architecture, superscalar, speculative execution, simultaneous multi- threading, thread-level parallelism

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