This article presents an approach that helps convert a given C program into a hardware implementation for a digital circuit design. Based on and extended from the concept of hierarchical finite-state machines (HFSMs), four built-in HFSM templates, namely Seq, Par, Loop and Atomic, are proposed and used as the elementary components of a hardware design. A guideline on the refinement of a C program is also proposed; the refined C functions are compiled into HFSMs that in turn generate synthesizable hardware description language (HDL) code as the final design. A set of HFSMs is viewed as an intermediate representation between C and HDL and can be functionally simulated. Two modeling levels, i.e. cycle-accurate and cycle-approximated, are supported. A compilation technique based on syntax-directed translations is used to automate the proposed approach. Experimental results on several well-known algorithmic benchmarks show the effectiveness of the proposed approach.