JISE

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Journal of Information Science and Engineering, Vol. 34 No. 4, pp. 1031-1046

EPEE 3.0: A Unified Host-FPGA Communication Library Framework for SDR Platforms

ZHI-WEI LI, JUN LIU⁺, TAO WANG AND BO-YAN DING
Center for Energy-Efficient Computing and Applications
School of Electronics Engineering and Computer Science
Peking University
Beijing, 100871 P.R. China
E-mail: {zhiwei.li; juneliu; wangtao; dboyan}@pku.edu.cn

Field programmable gate arrays (FPGA) are becoming more and more attractive as accelerator platforms. Many FPGA accelerators use frame-oriented transmission. As there is no standard frame-oriented Host-FPGA communication framework, FPGA accelerator developers have to write a significant amount of code on both the FPGA side and the host side. In this paper, we present a frame-oriented high-performance Host-FPGA communication framework EPEE 3.0 that supports PCIe and USB. It is implementted by using Xilinx Kintex-7 FPGA with PCIe Gen2 X8 and USB 3.0. Evaluation shows that EPEE 3.0 achieves a high throughput and can be easily used by FPGA developers.

Keywords: communication library, frame-oriented, SDR platform, FPGA, PCIe, USB

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