We extend the Shen-Ferguson approach of testing carry-save (CS) array multipliers to the testing of four other practical cellular array multipliers commonly used in digital signal processing: 1) the modified CS array multiplier without primary carry inputs is shown to be C-testable at the expense of only two extra input pins; 2) the pipelined (systolic) array multiplier, which differs from the CS array multiplier in the additional latches between adjacent cells, is C-testable by modifying the cell function in the same way; 3) the two's-complement pipelined multiplier works as well; 4) the operand-resident multiplier is shown to be C-testable partly by truth-table modification and, partly, by scan path design.