Major Architectural Features of the Spectra-I Superscalar Microprocessor
Yen-Jen Oyang, Chun-Hung Wen, Ching-Chuan Chiang, Ching-Te Lin, Yu-Fen Chen, Shu-May Lin, Chao-Yi Fang, Fu-Li Chen and Chou-Yu Ku Department of Computer Science and Information Engineering National Taiwan University Taipei, Taiwan, R.O.C.
This paper elaborates the major architectural features of the Spectra-I superscalar microprocessor. The design of Spectra-I is aimed at exploiting multi-way branch operations to boost superscalar processor performance. This objective is achieved with the development of a compiler technique called the SV transformation and a new hardware multi-way branching mechanism. Preliminary performance analysis shows that Spectra-I, with two parallel execution units, achieves a speedup of 1.62 over a typical RISC processor.