JISE


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Journal of Information Science and Engineering, Vol. 31 No. 6, pp. 1885-1901


A Cost-Effective 3D SoC Silicon Prototyping Platform


CHIH-CHYAU YANG, CHIEN-MING WU AND CHUN-MING HUANG 
National Chip Implementation Center 
National Applied Research Laboratories 
Hsinchu, 300 Taiwan 
E-mail: {ccyang; wucm; cmhuang}@cic.narl.org.tw


    This paper presents a cost-effective three-dimensional (3D) SoC silicon prototyping platform, namely, MorPACK (morphing package). MorPACK is a 3D structure by stacking circuit substrates with high density connectors and has the capability of integrating heterogeneous blocks. Through system partitioning and tri-state interfaces, MorPACK allows a system to be easily extended by peripheral interfaces and improved by updating the bare dies/substrates. With these characteristics, total silicon prototyping cost of SoC projects/designs can be greatly reduced by utilizing the MorPACK common platform. In addition, compared to conventional substrates assembled with solder-balls and pogo-pin sockets, high density connectors in the MorPACK platform can also benefit the fabrication process with lower cost and higher yield rate. To demonstrate the effectiveness of the proposed methodology, an example of six SoC projects is implemented with MorPACK platform in this paper. The result shows that the fabrication cost can be significantly reduced by the proposed MorPACK platform, and the performance and power consumption of MorPACK in 3D can have good improvements than in 2D architecture.


Keywords: 3D prototyping platform, system-on-chip, SoC silicon prototyping, FPGA, and platform-based design

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