JISE


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Journal of Information Science and Engineering, Vol. 27 No. 5, pp. 1513-1526


Minimum Inserted Buffers for Clock Period Minimization


SHIH-HSU HUANG+, GUAN-YU JHUO AND WEI-LUN HUANG
Department of Electronic Engineering 
Chung Yuan Christian University 
Chungli, 320 Taiwan 
+E-mail: shhuang@cycu.edu.tw


    It is well known that the combination of clock skew scheduling and delay insertion can achieve the lower bound of sequential timing optimization. Previous works focus on the minimization of required inserted delay. However, from the viewpoint of design closure, minimizing the number of inserted buffers is also very important. In this paper, we propose an MILP (mixed integer linear programming) approach to minimize the number of inserted buffers under the constraints on the lower bound of sequential timing optimization and the lower bound of required inserted delay. Note that our MILP approach guarantees obtaining the optimal solution. Experimental results consistently show that our MILP approach can greatly reduce the number of inserted buffers.


Keywords: high performance, sequential circuits, timing optimization, clock period, buffer insertion

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