JISE


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Journal of Information Science and Engineering, Vol. 25 No. 4, pp. 1041-1054


VLSI Architecture of Euclideanized BM Algorithm for Reed-Solomon Code


HUANG-CHI CHEN1,2, YU-WEN CHANG3 AND REY-CHUE HWANG1 
1Deaprtment of Electrical Engineering 
I-Shou Univerity 
Kaohsiung, 840 Taiwan 
2Deaprtment of Management Information System 
Far East University 
Tainan, 744 Taiwan 
3Deaprtment of Electronic Communication Engineering 
National Kaohsiung Marine University 
Kaohsiung, 840 Taiwan


    In 1988, Eastman showed that the Euclideanized Berlekamp-Massey (BM) algorithm can be used to eliminate the calculation of discrepancies and the divisions of the finite field elements to find the errata locator polynomial in a Reed-Solomon (RS) decoder. However, the separate computations of the errata locator and the errata evaluator polynomials are still needed in Eastman’s decoder. In this paper, a modified decoding algorithm based on the idea of Eastman is presented. It is derived to solve the errata locator and the errata evaluator polynomials simultaneously without performing the operations of polynomial division and field element inversion. Moreover, the weights used to represent the discrepancies at each iteration can be directly extracted from the coefficient. Therefore, the proposed algorithm saves many controlling circuits and provides a modular VLSI architecture with parallel. As a consequence, it is simple and easy to implement. And the decoding complexity of the algorithm proposed by Eastman can be further reduced.


Keywords: error correcting code, Reed-Solomon code, Berlekamp’s key equation, Euclidean algorithm, VLSI, architecture

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