JISE

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Journal of Information Science and Engineering, Vol. 16 No. 5, pp. 751-766

A Behavior-Level Fault Model for the Closed-Loop Operational Amplifier

Yeong-Jar Chang, Chung Len Lee, Jwu E Chen⁺ and Chauchin Su⁺⁺
Department of Electronics Engineering & INstitute of Electronics
National Chaio Tung University
Hsinchu, Taiwan 300, R.O.C.
⁺Department of Electrical Engineering
Chung-Hua University
Hsinchu, Taiwan 300, R.O.C.
⁺⁺Department of Electrical Engineering
National Central University
Chungli, Taiwan 320, R.O.C.

In this paper, a simple behavior-level fault model, which is able to represent the faulty behavior of the closed-loop operational amplifier (OP), is presented. The fault model, derived from the macro equivalent circuit of the OP but verified with transistor level simulation, consists of the offset fault and the limited-current fault. It can represent the faulty behavior of the closed loop OP of all the transistor parametric (soft) faults and many of the catastrophic (hard) faults. Due to its simplicity, the proposed fault model (1) significantly reduces the complexity of fault simulation, and (2) makes closed-form analysis of the faulty behavior of the closed loop OP feasible when the closed loop OP is used as a basic building block of a complicated circuit. Although derived for DC, it can also be applied to AC fault analysis.

Keywords: fault simulation, fault model, macro-modeling, operational amplifier, analog/mixed testing, Monte Carlo

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